1. Field of the Invention
This invention relates generally to hardware emulation and more particularly concerns multi-port memory emulation.
2. Description of the Prior Art
Various tools are used when designing integrated circuits. One such tool is a hardware emulation system. Examples of such emulation systems are described in U.S. Pat. Nos. 5,109,353 to Sample et al and 5,036,473 to Butts et al, both of which are incorporated by reference.
When designing integrated circuits, a netlist description of the integrated circuit is generated. The netlist is a description of the integrated circuit's components and electrical interconnections. It can be used to create all necessary masks for actual fabrication of the integrated circuit.
As described in the Sample et al and Butts et al patents, emulation technology can be used to ensure that the integrated circuit under design actually works in the system in which it will be installed. Reconfigurable emulation systems typically are comprised of multiple interconnected reconfigurable logic devices such as field programmable gate arrays (FPGAs). Reconfigurable logic devices are ideal for the emulation of the logic circuits of a given integrated circuit design. However, modern integrated circuits such as microprocessors also incorporate memory circuits which can be difficult to emulate properly. Furthermore, the memory circuits are often multi-port in design, which is even more difficult to emulate properly.
Typical memory circuits are arranged such that they have a plurality of memory locations. Each memory location can store a certain number of bits. Memory circuits are typically classified by the number of memory locations they have (often referred to as the "depth" of the memory circuit) and the number of bits that can be stored in each location (often referred to as the "width" of the memory circuit). Therefore, a memory circuit having thirty-two locations with each location containing eight bits would be called a "thirty-two by eight" memory circuit. When the memory circuit has multiple ports, the memory circuit is further defined by the number of write ports and the number of read ports.
In a conventional multi-port memory, data can be written to memory locations through different ports. Each write port can access each memory location and each write port can write at the same time. However, it is not possible for different ports to write data to the same memory location at the same time. Likewise, each read port can access each memory location and each read port can read data at the same time. However, unlike the write ports, different read ports can read data from the same address at the same time.
Newer generations of reconfigurable logic devices have the ability to configure memory circuits within their configurable logic blocks, or CLBs. One such reconfigurable logic device is the XC4000 family from Xilinx, Inc., San Jose, Calif. In the XC4000 family, each CLB can implement a sixteen by two or a thirty-two by one static random access memory (RAM). However, there is no multi-port memory capability.
An example of a method for implementing multi-port memory circuits in an emulation system is described in pending U.S. patent application Ser. No. 08/067,571 entitled Multi-Port Memory Emulation. This co-pending application is hereby incorporated by reference. This method converts the netlist's transistor level definitions of memory into logical definitions in order to implement the memory within a Xilinx FPGA.
This method, however, requires a large amount of the CLB capacity of the emulation system. Therefore, it would be desirable to have a method for emulating multi-port memory circuits that does not require a large number of CLBs.